FIG. 1 is a schematic block diagram of a conventional digital versatile disk ROM (DVDROM) system. Such a system typically includes a spindle/sled motor 100, an optical pickup 102, a RAM 120, a radio frequency (RF) amplifier 110, a data processor 130, a DRAM 140, an advanced technology attachment packet interface (ATAPI) unit 150, a digital servo 170 and a motor driver 160.
The spindle/sled motor 100 rotates a disk under the control of the motor driver 160. The optical pickup 102 emits a laser beam to the disk and senses reflected light as data to be read from the disk. The RF amplifier 110 amplifies an analog RF signal 103 output by the optical pickup 102 and generates eight-to-fifteen modulated (EFM) data 111.
The data processor 130 EFM-demodulates the EFM data from the RF amplifier 110 and writes the demodulated data 131 to an external memory 120, which is typically a RAM. The data processor 130 further corrects errors in the EFM-demodulated data 131 stored in the RAM 120 in an error-correction-coding (ECC) block unit, and writes the error-corrected data to the RAM 120. The error-corrected EFM data 132 is transferred to a host such as a personal computer via the ATAPI unit 150 upon a request from the host.
The digital servo 170 receives control signals 133 processed by the data processor 130 to control rotation of the motor, and tracking and focusing of the laser beam. The motor driver 160 generates a driving signal 161 for driving the spindle/sled motor 100 in accordance with control signals generated by the digital servo 170 to thereby control rotation of the disk.
The data processor 130 simultaneously performs three operations: writing of EFM-demodulated data (hereinafter, referred to as EFM-write), error-correction decoding of EFM-demodulated data (hereinafter, referred to as ECC), and transferring of error-corrected data to host (hereinafter, referred to as host-transmission). Accordingly, the RAM 120 is partitioned into three banks, i.e., bank 0, bank 1 and bank 2 for storing three ECC data blocks, one of the banks being used for EFM-write, another used for ECC, and another used for host-transmission. Since a single ECC block typically consists of 37,856 bytes of data in the DVD-ROM system, a 1 Mb RAM may be used for the external memory 120 to store three ECC blocks. To manage this process, the data processor 130 generates an ECC block synchronization signal (ECC SYNC) to process data in the ECC block units.
FIGS. 2A-2D illustrate the operation of the external memory 120. FIG. 2A shows an ECC block sync signal, FIG. 2B shows a bank pointer for EFM-write, FIG. 2C shows a bank pointer for ECC, and FIG. 2D shows a bank pointer for host-transmission.
When the DVD-ROM system is reset to perform an initial operation at time t.sub.1, the bank pointer for EFM-write is set to `0`, the bank pointer for ECC is set to `2`, and the bank pointer for host-transmission is set to `1`. Accordingly, EFM-demodulated data is written into bank 0.
When EFM data of the first ECC block is completely written and the next ECC block is received at time t.sub.2, the bank pointers for EFM-write, ECC, and host-transmission are changed into `1`, `0`, and `2`, respectively, in response to the ECC block sync signal. Accordingly, EFM-demodulated data is written into bank 1, and error-correction decoding is carried out for data stored in bank 0. When a third ECC block is received at time t.sub.3, the bank pointers for EFM-write, ECC, and host-transmission are changed to `2`, `1`, and `0`, respectively. Thus, bank 2 is used for EFM-write, bank 1 is used for ECC, and bank 0 is used for host-transmission. At time t.sub.4, the bank pointers return to `0`, `2`, and `1` respectively.
In the conventional system, when a new ECC block sync signal is generated and new bank pointers are set when the ECC operation or host-transmission has not fully completed for the respective current ECC block, the ECC and host-transmission operations for the current blocks are abandoned and EFM-write, ECC, and host-transmission is initiated for the following blocks, as designated by the bank pointers. In such a case, the data which has been EFMdemodulated but not ECC-decoded, or ECC-decoded but not transferred to the host is discarded. Accordingly, that data must be read again from the disk to be transferred, and consequently the data transfer rate between the DVD-ROM system and host is adversely affected.
In order to maintain the transfer rate, and to avoid discarding processed data, a DRAM 140 having a capacity of 4 Mb, 8 Mb or 16 Mb may be employed as a buffer in combination with, or instead of, the 1 Mb SRAM 120. In this system, the SRAM 120 and/or DRAM 140 are controlled so that data is balanced to prevent overflow or underflow of data stored therein. For example, when the data request rate from the ATAPI unit 150 is low, the buffer is controlled to prevent overflow. When the data request rate from the ATAPI unit 150 is high, the buffer is controlled to prevent underflow. In this configuration, manufacturing costs of the DVD-ROM system are increased due to the large size of the external memory, and system complexity is increased for maintaining data balance.